export default  {
	"title": '计算机系统结构_在线2',
	"testId": '83487',
	"praxiseList": [
		{
			"id": 127192,
			"title": "某32位计算机的cache容量为16KB，cache行的大小为16B，若主存与cache地址映像采用直接映像方式，则主存地址为0x1234E8F8的单元装入cache的地址是？",
			"options": "[\"01000100011010\",\"00010001001101\",\"11010011101000\",\"10100011111000\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127193,
			"title": "有效容量为128KB的cache，每块16字节，采用8路组相联，字节地址为1234567H的单元调入该cache，则其tag应为？",
			"options": "[\"12345H\",\"1234H\",\"2468H\",\"048DH\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127194,
			"title": "需要定时刷新的半导体存储器芯片是？",
			"options": "[\"EPROM\",\"SRAM\",\"Flash Memory\",\"DRAM\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127195,
			"title": "假定采用多模块交叉存储器组织方式，存储器芯片和总线支持突发传送（burst)，CPU通过存储器总线读取数据的过程为：发送首地址和读命令需1个时钟周期，存储器准备第一个数据需8个时钟周期(即CAS潜伏期=8)，随后每个时钟周期总线上传送1个数据，可连续传送8个数据(即突发长度=8)。若主存和cache之间交换的主存块大小为64B，存储宽度和总线宽度都为8B，则cache的一次缺失损失（缺失开销）至少为（）个时钟周期。",
			"options": "[\"65\",\"33\",\"17\",\"20\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127196,
			"title": "假定CPU通过存储器总线读取数据的过程为：发送地址和读命令需1个时钟周期，存储器准备一个数据需8个时钟周期，总线上每传送1个数据需1个时钟周期，若主存和cache之间交换的主存块大小为64B，存取宽度和总线宽度都为8B，则cache的一次缺失损失（缺失开销）至少为（  ）个时钟周期。",
			"options": "[\"160\",\"80\",\"72\",\"64\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127197,
			"title": "在程序的执行过程中，高速缓存（cache）与主存的地址映射是由（）。",
			"options": "[\"程序员调度的\",\"操作系统来管理的\",\"硬件自动完成的\",\"编译器执行的\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127198,
			"title": "采用虚拟存储器的目的是？",
			"options": "[\"增加存储系统结构的层次性\",\"扩大存储器的寻址空间\",\"扩大辅存的存取空间\",\"提高主存的访问速度\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127199,
			"title": "给定一个32位 Linux 系统，系统中有一个数据容量为128 bytes的2路组关联映射cache，每个cache block的大小为32 bytes.  Long long 数据类型的长度为8 bytes， int数据类型的长度为4 bytes. 对如下程序，假设 table数组的内存起始地址是0x0.\nint i, int j; \nint table[4][8];\nfor (j = 0; j < 8; j++) \n for (i = 0; i < 4; i++) \n       table[i][j] = i + j;\ntable中元素的访问，cache缺失率为多少？",
			"options": "[\"1\\/16\",\"1\\/8\",\"1\\/4\",\"1\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127200,
			"title": "下列正确的说法是（）。\n1）TLB是页表的cache；\n2）主存是磁盘的cache；\n3）TLB采用一般使用全相联映射；\n4）如果发生TLBmiss, 就一定会发生cache miss",
			"options": "[\"1）\",\"1）和2）\",\"1）2）4）\",\"全对\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127201,
			"title": "有关多级cache的设计，下面哪些是错误的？",
			"options": "[\"多级cache是指存储系统有多级cache组成，而不是仅仅只有一个主存和一个cache\",\"一级cache更关注缺失率，二级cache更关注命中时间\",\"采用一个大的二级cache来处理一级cache的缺失，可以降低缺失代价，从而降低平均存储器访问延迟\",\"一级cache更关注命中时间，二级cache更关注缺失率\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127202,
			"title": "高速缓存的缺失(miss)可以分为三类：\n1）强制缺失(compulsory miss)，也称为cold start miss. 是在没有对cache中出现过的块第一次访问时发生的缺失。\n2）冲突缺失（conflict miss). 在组相联或者直接映射cache中，很多块竞争同一个组导致的缺失。这种缺失在使用相同大小的全相联映射中是不存在的。\n3）容量缺失（capacity miss), 是由于cache在全相联时都不可能容纳所有请求的块而导致的缺失。\n关于这几种缺失的描述，下列选项中正确的有哪些？\nA、增加cache 容量，可以减少容量缺失；提高关联度，可以减少冲突缺失；\nB、 全相联映射没有冲突缺失\nC、没有减少冲突缺失的方法\nD、在减少缺失方面，关联度比容量更重要",
			"options": "[\"A、B、C\",\"A\",\"全对\",\"A和B\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127203,
			"title": "下列命中组合情况中，一次访存过程中不可能发生的是？",
			"options": "[\"TLB命中、cache命中、内存Page命中\",\"TLB未命中、cache命中、内存Page命中\",\"TLB未命中、cache未命中、内存Page命中\",\"TLB未命中、cache命中、内存Page未命中\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127204,
			"title": "假设某计算机按字编址，cache有4个行（数据块），cache和主存之间交换的块大小为2个字。若cache的内容初始为空，采用2路组相联映射方式和LRU替换策略，访问的主存的字地址依次为0，1，2，3，4，5，6，7，8时，命中cache的次数是？",
			"options": "[\"6\",\"8\",\"2\",\"4\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127205,
			"title": "如果虚实地址转换（virtual-to-physical address translation）花费了大约几十到100个时钟周期，导致这么长的延迟最可能的原因是什么？",
			"options": "[\"高速缓存失效(cache miss)\",\"页面失效(page fault)\",\"读磁盘\",\"TLB miss\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127206,
			"title": "寄存器中的值有时是地址，有时是数据，在指令中，它们在形式上没有差别，只有通过（   ）才能识别它是数据还是地址。",
			"options": "[\"寄存器编号\",\"判断程序\",\"指令操作码或寻址方式位\",\"时序信号\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127207,
			"title": "关于标志寄存器（例如：Intel X86的EFLAGS寄存器）的叙述，错误的是？",
			"options": "[\"可以用它来存放执行指令得到的各种标志信息\",\"条件转移指令根据其中的一些的标志位来确定PC的值\",\"可以通过指令直接访问标志寄存器、并修改它的值\",\"不需要像通用寄存器那样，对标志寄存器进行编号\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127208,
			"title": "对于运算类指令或传送类指令，通常需要在指令中指出操作数或操作数所在的位置。通常，指令中指出的操作数不可能出现在（  ）中。",
			"options": "[\"程序计数器\",\"存储单元\",\"通用寄存器\",\"指令\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127209,
			"title": "IA-32中指令“leal 8(%edx, %esi, 4), %edx”的功能是？",
			"options": "[\"R[esi]+R[edx]*4+8<-R[edx]\",\"R[edx]+R[esi]*4+8<-R[edx]\",\"R[edx]<-R[edx]+R[esi]*4+8\",\"R[edx]<-R[esi]+R[edx]*4+8\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127210,
			"title": "以下是C语言赋值语句\"x=a*b+c;”对应的x86-64汇编代码：\nmovslq %edx, %rdx\nmovsbl %sil, %esi\nimull %edi, %esi\nmovslq %esi, %rsi\nleaq (%rdx, %rsi), %rax\n已知x,a,b和c分别在RAX，RDI，RSI和RDX对应宽度的寄存器中，根据上述汇编指令序列，推测x,a,b和c的数据类型分别为？",
			"options": "[\"x：long    a：long     b：char    c：int\",\"x：long    a：long  b：char  c：long\",\"x：long     a：int    b：char  c：long\",\"x：long    a：int     b：char    c：int\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127211,
			"title": "有以下C语言声明语句：\nint array[10] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9};\n假设编译器将array 放在%ecx寄存器. 怎样将array[3]移入%eax寄存器？（假设%ebx中的值是3）",
			"options": "[\"leal 12(%ecx),%eax\",\"leal (%ecx,%ebx,4),%eax\",\"leal 4(%ecx,%ebx,1),%eax\",\"movl (%ecx,%ebx,4),%eax\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127212,
			"title": "对一个x86-64处理器上的64位Linux系统, 以下说法哪个是错误的？",
			"options": "[\"所有的函数参数都通过栈传递\",\"拥有比32位系统更多的寄存器\",\"%rax用作函数的返回值\",\"%eax和%ebx可以如同在32位系统上一样使用\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127213,
			"title": "程序P中有两个unsigned类型变量i和j，被分别分配在寄存器EAX和EDX中，P中存在以下if语句：\nif(i < j) {...}\n该if语句对应的指令序列一定不会是（）。",
			"options": "[\"cmpl %edx, %eax\\njb 8048460\",\"cmpl %eax, %edx\\njae 8048480\",\"cmpl %eax, %edx\\njbe 804847c\",\"cmpl %eax, %edx\\nja 8048380\"]",
			"answer": "2",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127214,
			"title": "在MIPS处理器中，假定int型变量f 、g、h、i和j，依次分配到寄存器$s0, $s1, $s2, $s3, $s4中，假设int型数组A和B的基地址依次放置寄存器$s6和 $s7中，下面那段代码表示 f=g-A[B[4]] ？",
			"options": "[\"lw $t0, 16($s7)\\nsll $t0, $t0, 2\\nadd $t0, $t0, $s6\\nlw $s0, 0($t0)\\nsub $s0, $s1,$s0\",\"lw $t0, 16($s7)\\nadd $t0, $t0, $s6\\nlw $s0, 0($t0)\\nsub $s0, $s1,$s0\",\"lw $t0, 4($s7)\\nadd $t0, $t0, $s6\\nlw $s0, 0($t0)\\nsub $s0, $s1,$s0\",\"lw $t0, 16($s7)\\nlw $s0, 0($t0)\\nsub $s0, $s1,$s0\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127215,
			"title": "已知：寄存器$t0中的值位0x55555555, 执行以下MIPS指令后，寄存器$t2中的值为多少？\nsll $t2, $t0, 4\nandi $t2, $t2, -1",
			"options": "[\"0x55555550\",\"0xFFFFFFFF\",\"0xFEFFFEDE\",\"0x57755770\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127216,
			"title": "CPU中控制器的完整功能是？",
			"options": "[\"完成对指令的译码，并产生控制信号\",\"产生时序信号\",\"完成对指令的译码\",\"从主存中取出指令\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127217,
			"title": "假设不考虑中断和异常处理（这个内容在以后的章节介绍），关于程序计数器PC的叙述中，哪个是错误的？",
			"options": "[\"条件转移指令（例如:beq)指令执行后，PC的值一定是跳转到的目标地址\",\"每条指令执行后，PC的值都会改变\",\"无条件转移指令（jump)指令执行后，PC的值一定是跳转到的目标地址\",\"指令顺序执行时，PC的值会改变为下一条指令的地址，在MIPS中，PC的值自动加4\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127218,
			"title": "CPU取出一条指令并执行所用的时间被称为（）。",
			"options": "[\"机器周期\",\"CPU周期\",\"时钟周期\",\"指令周期\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127219,
			"title": "有关指令周期的叙述，错误的是？",
			"options": "[\"指令周期的第一个阶段是取指令阶段\",\"一个指令周期由若干个机器周期或时钟周期组成\",\"单周期处理器的指令周期就是一个时钟周期\",\"乘法指令的加法指令的指令周期一样长\"]",
			"answer": "4",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127220,
			"title": "下面有关处理器时钟信号的叙述，错误的是？",
			"options": "[\"处理器总是在一个时钟信号来到时，就开始执行一条新的指令\",\"边沿触发的状态单元，总在时钟的上升沿或下降沿开始改变状态\",\"每个时钟周期被称为一个节拍，机器的主频就是时钟周期的倒数\",\"时钟周期以相邻状态单元之间最长的组合逻辑延迟为基准来确定\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127221,
			"title": "下列关于处理器数据通路的叙述，错误的是？",
			"options": "[\"通用寄存器是状态单元，但独立于处理器的数据通路，不包含在数据通路中\",\"ALU是组合逻辑单元，用于执行各类算术与逻辑运算\",\"数据通路所实现的功能由控制器发出的控制信号决定\",\"数据通路由若干组合逻辑组件和状态单元组件连接而成\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127222,
			"title": "下面关于多周期处理器与单周期处理器的比较，错误的是？",
			"options": "[\"单周期处理器的CPI总比多周期处理器的CPI大\",\"一条指令执行过程中，单周期处理器中每个部件只能被使用一次，而多周期处理器中同一个部件可以使用多次\",\"单周期处理器的时钟周期比多周期处理器的时钟周期长\",\"一条指令执行过程中，单周期处理器中的控制信号取值不改变，而多周期处理器中的控制信号可能会发生改变\"]",
			"answer": "1",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127223,
			"title": "下面是有关MIPS架构的beq指令的单周期数据通路设计的叙述,哪些是正确的？\n1.在beq指令的执行过程中，ALU的两个输入都来自寄存器堆\n2.在beq指令数据通路中，ALU的控制信号一定为“sub”（即ALU做减法）\n3.在beq指令数据通路中，一定有一个加法器用于计算目标转移地址\n4.在beq指令的执行过程中，数据不会流经符号扩展部件",
			"options": "[\"2，3，4\",\"全部\",\"1，2，3\",\"1，3，4\"]",
			"answer": "3",
			"type": "single",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127224,
			"title": "系统加速比=总执行时间(改进前) /总执行时间(改进后)",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127225,
			"title": "系列机是指具有相同的体系结构但具有不同组织和实现的一系列不同型号的机器。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127226,
			"title": "数 据 宽 度 就 是 Ｉ ／ Ｏ 设 备 取 得 Ｉ ／ Ｏ 总 线 后 所 传 送 数 据 的 总 量。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127227,
			"title": "摩尔定律:集成电路密度大约每两年翻一番。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127228,
			"title": "当今计算机领域市场可划分为:服务器、桌面系统、嵌入式计算三大领域。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127229,
			"title": "并行主存系统包括单体多字，多体单字和多体多字交叉存储器。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127230,
			"title": "实现软件移植的基本技术有同一高级语言， 采用系列机， 模拟和仿真。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127231,
			"title": "存储系统是将多种不同工艺的存储器组织在一起 ,从逻辑上能成为一个整体.",
			"options": "",
			"answer": "-1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127232,
			"title": "存储体系就是从程序员角度来看 , 各种不同工艺的存储器在逻辑上是一个整体。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		},
		{
			"id": 127233,
			"title": "大概率事件优先原则: (基本思想)对于大概率事件(最常见的事件),赋予它优先的处理权和资源使用权,以获得全局的最优结果。",
			"options": "",
			"answer": "1",
			"type": "charge",
			"hard": 1,
			"explain": "无",
			"regtime": "2021-03-18 10:39:28",
			"last_time": null,
			"iscorrect": 0,
			"user_answer": ""
		}
	]
}